DCI Power Per Bit Has a Floor — And We're Hitting It

Every generation of coherent pluggables came with the same chart on the same slide. A clean descending curve, pJ/bit on the Y axis, time on the X axis. Forty pJ/bit in 2018. Twenty-eight in 2020. Eighteen in 2022. Twelve in 2024. The next bar always ended below the last one, and the audience always nodded.

The curve is flattening. Not because anyone is slacking off — because the physics underneath the curve is not a roadmap, it's a wall, and we're now close enough to see it.

The numbers, current generation

A 400ZR module today, with a DSP from one of the three remaining houses, sits somewhere between 9 and 11 pJ/bit at the line side. A 400ZR+ pushes it up a little — call it 10 to 12, depending on the SOA and reach class. 800ZR with current silicon is in the 8-to-10 range. Marketing slides claim lower. Public datasheets — the ones you can verify — broadly land here.

For context: 100G in a CFP2-ACO in 2018 was around 35 pJ/bit. Then 400ZR cut it in half. Then 800ZR shaved off a third more. Now we're scraping out single-digit improvements per generation, and each of those costs more silicon and more verification cycles than the last.

Where the floor comes from

The DSP is doing fixed work. Equalisation, FEC, carrier recovery, sometimes nonlinearity compensation. The total bit-budget of operations per bit transmitted is bounded by what the constellation, the symbol rate, and the FEC overhead demand. You can win some at the process node, you can win some at architecture (the LPO route, which is the topic of another post), but the underlying compute load is not going to zero.

There's a soft floor somewhere around 7 to 8 pJ/bit on the DSP side for a coherent line interface running QAM modulation at the symbol rates the optics actually support. Add the laser, the modulator drivers, the TIA on the receive side, the cage power, and the floor for the whole pluggable lands north of that.

Shannon limits tell you the channel capacity. They don't tell you the energy cost of running close to the limit. The energy cost is the part that doesn't bend.

Why vendor slides still show steep curves

Three reasons. None of them are dishonest, exactly.

Generational mix. If you average across product families and weight by future shipment volume, you get a curve that bends nicely. The trick is that "future shipment volume" is the vendor's projection, and the projection always favours the new generation.

Line side versus system side. The line side number — just the DSP and the optics — drops. The system side, with switch ASIC, cage power, and line card overhead, often doesn't drop as fast. Vendors tend to quote line side.

Best-case modules. A vendor's most efficient module at design centre is not the one most customers buy. The lower-tier reach class, the volume SKU, runs hotter and uses more power. That number rarely shows up on the roadmap chart.

What flattening means for the next three years

If you're planning DCI capacity through 2028 on the assumption that pluggable power keeps halving, your power budget is going to be off by 20 to 30 percent. Aisle thermal designs that worked at the 2024 generation will hit margin at the 2027 generation, because you're getting more bits per port but the per-bit savings aren't keeping up with the per-port density.

The places I'd watch for the next real step change:

• LPO modules at metro reach with practical interop. Not a 50 percent reduction. A 30 percent reduction is plausible, and it's already sitting in some hyperscaler lab benches.
• Faster process nodes for the DSP itself. 3 nm DSP designs are taped out at two vendors. The power saving is real but the die area is the cost.
• Architectural shifts at the silicon-photonic integration layer. Genuine on-die laser integration, when it ships, takes a chunk out of the static budget.

The flat parts of the curve last longer than vendors like to admit. The interesting work is happening in the few places where the architecture itself changes — not in another generation of the same approach.

Build your power plans on the flat curve. Be pleasantly surprised if a real architectural shift lands. Don't bet capacity decisions on a slide.